Staff Digital Verification Engineer

onsemi is seeking a highly motivated Staff Digital Verification Engineer to join our team working on the TREO platform, focused on verification of digital top-level subsystem IP for next-generation automotive and intelligent power applications.

This role requires strong expertise in advanced verification methodologies, deep understanding of digital design, and the ability to collaborate cross-functionally with analog and mixed-signal teams.

• Verify digital top-level subsystem IP within the TREO platform, ensuring robust functionality and performance across use cases.


• Develop and execute constrained random verification environments using SystemVerilog and UVM.


• Architect and implement testbenches, including:
  
  
  
  • Scoreboards
  
  
  • Monitors
  
  
  • Stimulus generators
  
  
  • Checkers
  
  


• Define and track functional and code coverage, driving closure against defined verification plans.


• Perform and integrate formal verification techniques where applicable.


• Debug complex system-level issues across digital and mixed-signal boundaries.


• Collaborate closely with:
  
  
  
  • Digital design teams
  
  
  • Analog/mixed-signal design teams
  
  
  • System architects
  
  


• Contribute to verification strategy and methodology improvements, including reuse and scalability.


• Utilize tools such as Questa (Mentor/Siemens) for simulation and debugging.

• Bachelor’s or Master’s degree in Electronic Engineering, Computer Engineering, or related discipline.


• 5+ years of industry experience in digital verification.


• Strong hands-on experience in:
  
  
  
  • SystemVerilog and UVM
  
  
  • Constrained random verification methodologies
  
  
  • Formal verification techniques
  
  


• Solid understanding of digital design fundamentals (RTL design, timing, interfaces, etc.).


• Proven experience in:
  
  
  
  • Testbench architecture and development
  
  
  • Scoreboards, monitors, and checkers
  
  
  • Functional and code coverage methodologies
  
  


• Experience with Questa or equivalent simulation tools.


• Demonstrated ability to work across digital and analog/mixed-signal interfaces.

• Experience working on automotive or high-reliability semiconductor products.


• Familiarity with mixed-signal verification challenges.


• Exposure to AI-enabled verification flows, such as:
  
  
  
  • Coverage acceleration
  
  
  • Intelligent stimulus generation
  
  
  • Debug automation
  
  


• Knowledge of modern verification flows for large subsystem or SoC-level designs.


• Familiarity with scripting (Python, Tcl, or similar) for automation.

Key Skills

• Strong analytical and debug capabilities.


• Ability to work effectively in cross-functional teams.


• Clear communication skills (technical and non-technical).


• Proactive mindset with a focus on quality and continuous improvement.