Intern - Verification Engineer

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Job Description:

The Mixed‑Signal Development Group is responsible for delivering high‑quality analog, digital, and mixed‑signal intellectual property (IP) to divisions within Microchip. The group works with advanced CMOS technologies to develop critical interface IP that enables reliable, high‑performance system connectivity.

This internship opportunity is within the DDR PHY and Die‑to‑Die (D2D) IP Development team. The role provides practical exposure to industry‑standard verification methodologies and tools, while working under the guidance of experienced engineers in a collaborative environment.

Key Responsibilities:

Under the supervision of a technical lead or manager, the Verification Intern will:

• Gain foundational knowledge of DDR PHY and D2D interface architectures, including their role in system‑level integration
• Learn and apply verification methodologies through hands‑on project work
• Assist in the development and review of verification test plans and documentation
• Develop and execute verification testcases at block‑level or IP‑level
• Contribute to the development or enhancement of testbenches and Bus Functional Models (BFMs), as required
• Execute simulations, analyze results, and assist with functional debugging and issue reproduction
• Document findings clearly and support defect tracking and resolution
• Participate in functional coverage collection and analysis
• Collaborate with verification, design, and adjacent engineering teams as needed

Requirements/Qualifications:

• Currently pursuing or recently completed a Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related discipline
• Coursework in Digital Design and Computer Architecture
• Academic or project‑based experience using Verilog or SystemVerilog
• Basic understanding of RTL design and digital logic concepts
• Strong analytical and problem‑solving skills
• Effective verbal and written communication skills in English

Travel Time:

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