Senior Verification Engineer

We are Siemens

Siemens EDA is a global technology leader in electronic
design automation software. Our software tools enable companies around the
world to develop new and highly innovative electronic products faster and more
cost-effectively. Our customers use our tools to push the boundaries of
technology and physics in order to deliver better products in the increasingly
complex world of chip, board and system design.

Tessent Embedded
Analytics, part of Siemens EDA, is a pioneering developer of analytics and
monitoring technology at the heart of the systems-on-chip (SoCs) that power
today’s electronic products. Our embedded analytics technology allows product
designers to add sophisticated cybersecurity, functional safety and performance
tuning features; and it helps resolve critical issues such as increasing system
complexity and ever- decreasing time-to-market. We are proud of our technology
and selling globally to many of the most respected and most exciting technology
companies in the world.

The promise of a
digital future…today. With the digital twin, Siemens Digital Industries
Software blurs the boundaries between the virtual and physical, hardware and
software, design and manufacturing worlds. For more information about us visit
- https://www.youtube.com/watch?v=k6mVLaUyO4U

What we’re looking
For

Do you have expertise
in silicon IP and digital design using RTL languages? re you a Verification
Engineer with experience of verifying silicon IP?  We are looking for a
highly capable and dedicated Digital Design or Verification Engineers to join our
growing team here at Tessent Embedded
Analytics. If
you can you see yourself learning, growing, and succeeding in this exciting
position and would relish the opportunity help shape the development of Tessent
EA’s ground-breaking silicon IP then we would love to meet you!

What you’ll be doing

• Verifying our IP from devising a verification
  plan through to coverage closure


• Collaborate with design and architecture teams to
  understand design specifications and develop verification strategies.


• Accessing advanced tools and opportunities to
  influence the features of Mentor verification tools


• Develop and execute detailed verification plans
  for ASIC designs, ensuring comprehensive coverage of all design features
  and functionalities.


• Create and maintain reusable, scalable, and
  robust testbenches using industry-standard verification languages and
  methodologies (e.g., SystemVerilog, UVM).


• Identify, analyze, and debug design issues,
  working closely with design engineers to resolve them in a timely manner.


• Utilize and enhance automated verification tools
  and scripts to improve efficiency and coverage.


• Mentor and provide technical guidance to junior
  verification engineers, fostering a culture of continuous learning and
  improvement.


• Stay up-to-date with industry trends and
  advancements in verification methodologies and tools, integrating best
  practices into the verification process.

What you’ll bring

• Solid understanding of UVM and constraint random
  environments


• Verification Planning and Management methods
  skills


• Excellent SystemVerilog and Verilog experience
  including experience of formulating and writing SystemVerilog coverage
  statements


• Experience of creating testbenches for and
  testing of silicon IP


• Experience using EDA simulation tools including
  Questa, VCS or Xcelium


• Familiarity in using Metric Driven Verification
  methodology


• The ability to work as part of a team and under
  pressure is essential


• Familiarity with other verification techniques
  such as formal and unit level testing

Nice if you have

• Familiarity with SVA assertions or similar


• Familiarity with IC design and implementation


• Experience in Formal Verification Techniques and
  Tools

Join our Digital
World

We are an equal
opportunity employer and value diversity at our company. We do not discriminate
on the basis of race, religion, colour, national origin, sex, gender, gender
expression, sexual orientation, age, marital status, veteran status, or
disability status.

We offer a
comprehensive reward package which includes a competitive basic salary, bonus
scheme, generous holiday allowance, pension, private healthcare and actively
support working from home.

We will ensure that
individuals with disabilities are provided reasonable accommodation to
participate in the job application or interview process, to perform essential
job functions, and to receive other benefits and privileges of employment.
Please contact us to request accommodation.

At Siemens, we are
always challenging ourselves to build a better future. We have some of the
smartest minds working across the world, re-imagining the future and doing
extraordinary things. Join our Talent Community today and let's stay connected
in areas that interest you: https://new.siemens.com/global/en/company/jobs/digital-minds.html

Siemens Software. Transform
the everyday!

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