Anzahl der Bewerber
:000+
· Prepare externally provided Standard Cell Libraries (SNPS) for Infineon Camino Integration
· Create missing views/data (e.g. ndm, Apache redhawk)
· Create Open Access database out of base data and add Infineon specific views to it
· OA creation with schematic, layout, symbol
· Infineon specific views: Layout XL, abstract, Verilog, verilog_PG, module - direction/script to create them will be given.
· Create Infineon specific library description (.lib.xml) to prepare usage in Infineon environment.
· Run Quality Assurance checks and provide related reports
Requirements:
· Basic knowledge in Semicustom and/or Full Custom Flow
· ideally some experience with I nfineon Camino environment
· Knowledge with Synposis or Cadence
· Basic knowledge with Perl, Python, Tcl
· Basic Understanding of Verilog, NDM (SNPS data model), LEF, Liberty Files, requirements for DFT
Education:
· Bachelor/Master in Electrical Engineering or similar
· Master in Electrical Engineering or similar
· 5+ years experience in digital verification or layout
· Ideally basic knowledge in Standard Cell Libraries deliveries
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