Activate JobCopilot
Motivations
Vertically stacked ferroelectric FETs (3D FeFETs) areattracting increasing interest thanks to their non-volatility, high speed, lowenergy consumption, and high density.
In addition, the oxide-semiconductor channel enables high-enduranceoperation, making 3D FeFETs strong candidates for future high-bandwidth memory solutions.
However, several device aspects are still underinvestigation. One critical topic is cell-to-cell disturb, which mayoccur during standard read and write operations.
The goal of this internship is to assess the severity ofthese disturb mechanisms and to evaluate potential mitigation strategies.
Objectives
The selected candidate will be involved in the followingresearch activities at imec:
Requirements:
Type of internship: Master internship
Duration: up to 8 months
Required educational background: Electrotechnics/Electrical Engineering
University promotor: Jan Van Houdt (KU Leuven)
Supervising scientist(s): For further information or for application, please contact Nicolo Ronchi ([email protected])
The reference code for this position is 2026-INT-065. Mention this reference code in your application.
Only for self-supporting students.
Applications should include the following information:
Incomplete applications will not be considered.
Vertically stacked ferroelectric FETs (3D FeFETs) areattracting increasing interest thanks to their non-volatility, high speed, lowenergy consumption, and high density.
In addition, the oxide-semiconductor channel enables high-enduranceoperation, making 3D FeFETs strong candidates for future high-bandwidth memory solutions.
However, several device aspects are still underinvestigation. One critical topic is cell-to-cell disturb, which mayoccur during standard read and write operations.
The goal of this internship is to assess the severity ofthese disturb mechanisms and to evaluate potential mitigation strategies.
Objectives
The selected candidate will be involved in the followingresearch activities at imec:
- Electrical characterization of 3D ferroelectric capacitors and FETs
(IV sweeps, PV/PUND measurements, cycling, endurance testing) - Development of procedures to assess read/write cell-to-cell disturb during standard 3D FeFET operation.
- Evaluation of disturb mechanisms across different material stacks and proposal of mitigation techniques.
Requirements:
- Background in Electrical engineering, semiconductor physics, semiconductor device reliability.
- Fundamental knowledge of ferroelectric devices.
- Previous experience with electrical characterization of ferroelectric devices (FeFET and FeCAP).
- Internship up to 8 months year, self-supported
Type of internship: Master internship
Duration: up to 8 months
Required educational background: Electrotechnics/Electrical Engineering
University promotor: Jan Van Houdt (KU Leuven)
Supervising scientist(s): For further information or for application, please contact Nicolo Ronchi ([email protected])
The reference code for this position is 2026-INT-065. Mention this reference code in your application.
Only for self-supporting students.
Applications should include the following information:
- resume
- motivation
- current study
Incomplete applications will not be considered.
Your email job alert is now active!
