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Time-Dependent Dielectric Breakdown (TDDB) is a major reliability concern for CMOS technologies operating under prolonged electrical and thermal stress. TDDB is commonly described as a multi-stage process, in which the second stage, the wear-out phase, governs the progressive degradation of the gate dielectric towards catastrophic
breakdown and is therefore critical for lifetime prediction.
Despite its critical role, the wear-out phase remains poorly understood from both a physical and statistical perspective, and this internship directly addresses this open challenge by investigating the mechanisms governing progressive degradation in TDDB.
This learning experience proposes an experimental study of the voltage and temperature dependence of the TDDB wear-out phase in conventional SiO₂ gate dielectrics and in advanced high-k/metal gate (HKMG) technologies. Accelerated stress experiments will be carried out over a range of electric fields and temperatures, with continuous monitoring of breakdown electrical signatures, to isolate and characterize wear-out behavior.
By systematically comparing degradation kinetics in SiO₂ and HKMG devices, this work aims to elucidate technology-dependent wear-out mechanisms and support improved reliability modeling of modern gate stacks. In particular, these experiments are expected to provide insights into the distinct defect generation, transport, and evolution mechanisms in the SiO₂ interfacial layer and the HfO₂ high-k dielectric of HKMG technologies.
As an intern, you will join imec's Device Reliability expertise center, closely supervised by a PhD student and supported by an experienced research team.
Type of internship: Master internship, Bachelor internship
Duration: 2 months
Required educational background: Electrotechnics/Electrical Engineering, Materials Engineering, Nanoscience & Nanotechnology, Physics
University promotor: Clement Merckling (KU Leuven)
Supervising scientist(s): For further information or for application, please contact Sara Sacchi (< email deleted for security reasons >) and Robin Degraeve (< email deleted for security reasons >)
The reference code for this position is 2026-INT-013. Mention this reference code in your application.
Imec allowance will be provided.
Applications should include the following information:
Incomplete applications will not be considered.
breakdown and is therefore critical for lifetime prediction.
Despite its critical role, the wear-out phase remains poorly understood from both a physical and statistical perspective, and this internship directly addresses this open challenge by investigating the mechanisms governing progressive degradation in TDDB.
This learning experience proposes an experimental study of the voltage and temperature dependence of the TDDB wear-out phase in conventional SiO₂ gate dielectrics and in advanced high-k/metal gate (HKMG) technologies. Accelerated stress experiments will be carried out over a range of electric fields and temperatures, with continuous monitoring of breakdown electrical signatures, to isolate and characterize wear-out behavior.
By systematically comparing degradation kinetics in SiO₂ and HKMG devices, this work aims to elucidate technology-dependent wear-out mechanisms and support improved reliability modeling of modern gate stacks. In particular, these experiments are expected to provide insights into the distinct defect generation, transport, and evolution mechanisms in the SiO₂ interfacial layer and the HfO₂ high-k dielectric of HKMG technologies.
As an intern, you will join imec's Device Reliability expertise center, closely supervised by a PhD student and supported by an experienced research team.
Type of internship: Master internship, Bachelor internship
Duration: 2 months
Required educational background: Electrotechnics/Electrical Engineering, Materials Engineering, Nanoscience & Nanotechnology, Physics
University promotor: Clement Merckling (KU Leuven)
Supervising scientist(s): For further information or for application, please contact Sara Sacchi (< email deleted for security reasons >) and Robin Degraeve (< email deleted for security reasons >)
The reference code for this position is 2026-INT-013. Mention this reference code in your application.
Imec allowance will be provided.
Applications should include the following information:
- resume
- motivation
- current study
Incomplete applications will not be considered.
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