Optimizing Page Allocation over Heterogeneous Memory Systems

The proposed thesis aims to optimize the page allocation over heterogeneous

memory systems. The estimated workflow begins with monitoring and profiling of the target application to collect its memory access trace. This trace captures the application's

memory behavior and serves as the foundation for further analysis. The

gathered application memory trace is then utilized within a controlled

environment consisting of both real hardware-in-the-loop (Intel Optane DCPM) and simulated/emulated memory technologies. These simulations/emulations target various memory hierarchies and configurations, enabling detailed exploration of performance and behavior under different memory system designs. Additionally, swap logs and storage traces are generated to analyze data movement between main memory and storage layers. These traces are further correlated with storage technologies, allowing a holistic view of the system's data management and performance implications.
This thesis will be performed in NTUA with direct collaboration with IMEC - Leuven, Belgium.

TOPICS AVAILABLE: 1

PREREQUISITES:
• C/C++, Python, Bash/Shell Scripting
• Computer Architecture, Memory Organization
• Linux OS

Dr. Manolis Katsaragakis, Post-Doc Researcher, NTUA: [email protected]

Prof. Dimitrios Soudris, NTUA: [email protected]

Prof. Francky Catthor, NTUA: [email protected]

Type of internship: Master internship, PhD internship

Duration: 3

Required educational background: Electrotechnics/Electrical Engineering, Computer Science

Supervising scientist(s): For further information or for application, please contact Saeideh Alinezhad Chamazcoti ([email protected])

The reference code for this position is 2026-INT-014. Mention this reference code in your application.

Imec allowance will be provided.

Applications should include the following information:

• resume
• motivation
• current study

Incomplete applications will not be considered.