PA linearization and Modeling Developer

Candidates should have a minimum of 3-5 years of experience working directly in the development of Algorithms for ASIC and FPGAs with intermediate understanding of radio products (RF systemization, TRX and PA hardware design, integration of sub blocks within the TRX Downlink chain). Good understanding of Data communication theory, Integrated circuits design and operation, RF electronics, RF system design and wireless and Mobile communication systems technology. Good knowledge of 3GPP specifications, especially in Radio performance characteristics. Knowledge of radio standards (2G, 3G,4G, GSM, WCDMA, LTE, NR, Wi-Fi, 5G) Good knowledge of RF test instruments and verification process for PA design. Material Device Physics knowledge for Wide Band and high-Power LDMOS/GaN/GaAs PA's. Python and MATLAB based scripting and automation experience is preferred. ASIC, FPGA and DSP theoretical and practical knowledge and experience. Innovative, adaptable, and collaborative.