Senior Wireless Digital Verification Engineer

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

General Summary:

• Develop and execute verification plans for complex SoC designs and IP blocks.
• Architect and implement testbenches using SystemVerilog and UVM/OVM methodologies.
• Perform RTL verification, simulation, and debugging.
• Collaborate with design, architecture, and software teams to ensure functional correctness.
• Contribute to IP design reviews and sign-off processes.
• Support post-silicon validation and bring-up activities.
• Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance.
• Conduct CPU subsystem verification including coherency, cache behavior, and interrupt handling.
• Perform power-aware verification using UPF/CPF and validate low-power design intent.
• Execute performance verification to ensure bandwidth, latency, and throughput targets are met

• 2–15 years of experience in digital design and verification.
• Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB.
• Experience with CPU subsystem verification and performance modeling.
• Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus.
• Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python).
• Experience with power-aware verification methodologies and tools (e.g., UPF, CPF).
• Familiarity with performance verification techniques and metrics.
• Exposure to tools like Clearcase/Perforce and simulation/debug environments.
• Strong analytical, debugging, and communication skills.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

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