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STAGE - Analyse des courants de fuites des circuits à travers des mesures silicium et des outils de

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Description de l'emploi - STAGE - Analyse des courants de fuites des circuits à travers des mesures silicium et des outils de










At STMicroelectronics, we believe in the power of technology to drive innovation and make a positive impact on people, businesses, and society. As a global semiconductor company, our advanced technologies and chips form the hidden foundation of the world we live in today.


When you join ST, you will be part of a global business with more than 115 nationalities, present in 40 countries, and comprising over 50,000 diverse and dedicated creators and makers of technology around the world.


Developing technologies takes more than talent: it takes amazing people who understand collaboration and respect. People with passion and the desire to disrupt the status quo,  drive innovation, and unlock their own potential.


Embark on a journey with us, where you can innovate for a future that we want to make smarter and greener, in a responsible and sustainable way. Our technology starts with you.





YOUR ROLE 


Within various design's used for technology development, Static Leakage (IDDQ) is a key parameter for performance and becoming once again a very effective detector of defects. Across our portfolio of technologies IDDQ can vary from 10ns of nA /mm^2 to A/mm^2 . With TestChip, we have circuits with direct current of mA, and specific measurements of static current 10s of nA . All this leads to complexities to have the correct specifications for test and measurement and more efficient methods of test and analysis. The scope covers power analysis tools in design up to correlations with silicon expectations. 


The purpose of this internship is to propose a straightforward methodology for test and measurement specification, data sanity checking and silicon result analysis for IDDQ measurements, across our technology portfolio, using 90nm-Analog and 18nm-NVM technologies as examples. Among the technical challenges you’ll have to address:  



  1. Understand consistency between the different Si reading of IDDQ measurement coming from different objects.

  2. Does it scale with the size of the object? 

  3. Is the need of an ‘uplift’ factor demonstrated by experimental data?

  4. Understand the coherence between the different CAD solutions, on the same object.


 


You will be part of a multicultural team, in which you’ll have to share your progress on a regular basis. You’ll have to solicitate other Teams in the main field of expertise (Measurement, Design, Process integration, Silicon analysis) and work with other interns.


As an intern, you will be part of our campus, and you will have the opportunity exchange with other students. 


 


YOUR SKILLS & EXPERIENCES



  • Semiconductor and transistor physics. 

  • Digital design.

  • CAD tools.

  • English.


ST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction. ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.


At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination. We aim to recruit and retain a diverse workforce that reflects the societies around us. We strive for equity in career development, career opportunities, and equal remuneration. We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning. Diversity, equity, and inclusion (DEI) is woven into our company culture.


 


To discover more, visit st.com/careers.

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