DSP Engineer (SIMD, ASIP)

As our DSP Engineer (SIMD, ASIP), you will:

• Implement and optimize 5G NR PHY baseband algorithms on SIMD/vector DSP architectures (e.g., VLIW, NEON, AVX, custom DSPs)
• Translate floating-point reference models into bit-accurate fixed-point C/C++ implementations, with precise control of scaling, dynamic range, and quantization
• Design SIMD-efficient data paths, including memory layout, alignment, and vector access patterns
• Perform manual vectorization using intrinsics, avoiding reliance on compiler auto-vectorization
• Optimize critical kernels for throughput, latency, memory bandwidth, and power efficiency
• Analyze and tune performance-critical inner loops (e.g., LLR computation, equalization, MIMO detection, filtering)
• Develop robust fixed-point strategies (scaling, saturation, quantization) under realistic SNR conditions
• Profile and optimize code using cycle-accurate tools, performance counters, and hardware profilers
• Debug numerical issues such as overflow, precision loss, and convergence problems
• Collaborate closely with hardware teams to ensure efficient mapping to DSP/vector units and memory hierarchy
• Support bring-up, debugging, and performance tuning on real hardware

• Strong C/C++ experience in embedded or DSP systems
• Proven experience with SIMD/vector programming (intrinsics or DSP vector ISAs)
• Hands-on experience with fixed-point arithmetic, scaling, and quantization
• Experience optimizing performance-critical code (cycles, latency, memory)
• Solid understanding of computer architecture:
  • SIMD/vector pipelines
  • Memory hierarchy (cache, bandwidth)
  • Data alignment and layout
• Practical DSP knowledge sufficient for implementation of PHY algorithms (not necessarily algorithm design)
• Fluent in technical English communication

• Experience with:
  • ARM NEON, x86 AVX, or DSP-specific intrinsics
  • Manual loop unrolling, software pipelining, vector scheduling
  • Bit-accurate modeling vs. floating-point reference
• Ability to translate algorithm specifications into efficient low-level implementations
• Experience debugging fixed-point numerical issues
• Experience implementing one or more of:
  • Equalization / MIMO detection
  • LLR computation / demapping
  • OFDM receiver processing
  • Channel estimation
  • LDPC or Polar decoding

• Familiarity with 3GPP 5G NR PHY
• Experience with MATLAB or Python for validation
• Experience with modem or wireless communication systems

• The opportunity to work with the team on next-generation 5G semiconductor technologies tailored IoT and automotive markets.
• A dynamic start-up environment with lean structures and high visibility.
• An inclusive and diverse team in a thriving tech startup setting.
• Individual growth opportunities in a growth company. 
• Continuous learning through collaboration with senior engineers and hands-on exposure across multiple areas of semiconductor development.