Analog Modeling, verification and char engineer

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience. Title : Analog Modeling, verification engineer Proficiency in Verilog modeling and verification Strong self-motivation, teamwork, and communication skills Develop and verify models for mixed signal/analog IPs Automate repeatable tasks using AI Contribute to SERDES analog technical documentation Write behavioral Verilog/Verilog MS/real models Develop and maintain self-checking test-benches and test plans Create SV models and test-benches for transistor-level netlist verification Utilize simulators like VCS Script automation using Tcl/Perl/Python