CPU Systems Debug and Validation Engineer Oryon Server CPUs(India)

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. We are looking for CPU Systems Debug Engineers to lead end-to-end system-level debug for Oryon server-class CPUs, spanning core, uncore, memory, fabric, firmware, and platform interactions from first silicon through production. 12-20 years of experience in CPU/SoC system debug, post-silicon validation, or platform bring-up Strong understanding of CPU microarchitecture, cache coherence, memory systems, and interconnects Ability to reason across hardware, firmware, OS, and platform layers Impact: Own the most complex system-level CPU issues, ensuring stability, scalability, and reliability of Oryon server CPUs in real-world deployments. Lead system-level post-silicon debug across CPU cores, LLC, interconnect, memory, and I/O Debug complex issues involving coherency, ordering, interrupts, power management, and RAS Analyze failures across HW-FW-OS boundaries, including boot, stress, and long-running workloads Use on-chip trace, logic analyzers, performance counters, firmware instrumentation, and lab tools Drive root-cause analysis and closure in partnership with Architecture, RTL, DV, FW, PD, and Platform teams Support ES bring-up, stepping qualification, and system sign-off Feed system-level learnings back into future CPU architecture, firmware, and debug infrastructure