Design verification Engineer

Company : Uniconnect

Job Type : Full Time

Bengaluru, India

Number of Applicants

:

000+

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Job Description - Design verification Engineer

Experience in C/C++ programming is desirable.
Good communication skills
Excellent hands on Debug Skill is must.
Must have experience in developing test bench / test case using System Verilog & UVM.
Must have experience in functional coverage & assertions development.
Knowledge of system -level architecture including buses like AXI/AHB, bridges is a must.

Experience in any Processor or protocols is a must.
Self -motivated

Requirements

5+ years of experience in IP or SOC Verification.

Original job Design verification Engineer posted on GrabJobs ©. To flag any issues with this job please use the Report Job button on GrabJobs.

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