DSP / NPU Design Verification Sr Staff Engineer

## \nCompany:\n\nQualcomm India Private Limited\n\n## Job Area:\n\nEngineering Group, Engineering Group \u003e Hardware Engineering\n\nGeneral Summary:\n\nAs a leading technology innovator, Qualcomm pushes the boundaries of what\u0027s possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.\n\nMinimum Qualifications:\n\n\u2022 Bachelor\u0027s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. \nOR \nMaster\u0027s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. \nOR \nPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.\n\nJob Summary: \n\n\u00b7 Position for 12+ years of experience in design verification of complex Qualcomm propriety DSP/NPU IP\n\n\u00b7 DSP team is responsible for delivering high-performance DSP/NPU cores which are at the heart of Qualcomm\u0027s multi-tier SoC roadmap targeted for mobile space, AI, Automotive and more.\n\n\u00b7 Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property.\n\nJob Responsibilities: \n\n\u00b7 Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams.\n\n\u00b7 Implement and improve System Verilog/UVM Testbench Architecture.\n\n\u00b7 Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency.\n\n\u00b7 Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals.\n\n\u00b7 Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs.\n\n\u00b7 Complete all required verification activities at IP level and ensure high quality commercial success of our products.\n\n\u00b7 Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis.\n\n\u00b7 Responsible gate level simulation bring-up, gate level verification with timing simulations.\n\n\u00b7 Responsible for power aware RTL verification and gate level simulation.\n\nSkillset/Experience: \n\n\u00b7 12+ years experience in processor/ASIC design verification\n\n\u00b7 Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification.\n\n\u00b7 Expertise in System Verilog Testbench Architecture and implementation.\n\n\u00b7 Experience in writing C based and assembly level testcases is preferred.\n\n\u00b7 Exposure to power aware implementation and verification using UPF is a plus.\n\n\u00b7 Experience with advanced verification techniques such as formal and assertions is a plus.\n\n\u00b7 Gate-Level Simulation and Debug \u2014 0-delay, timing annotated and power aware.\n\n\u00b7 Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence .\n\n\u00b7 Scripting/Automation Skills \u2014 Perl, Python, Shell, Make file TCI .\n\n\u00b7 Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts.\n\n\u00b7 Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred.\n\n\u00b7 Experience in verification of Processor subsystems is preferred.\n\n\u00b7 Experience in creating validation suite and building automation. \n\n\u00b7 Should have excellent inter-personal and communication skills.\n\nApplicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm\u0027s toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).\n\nQualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.\n\nTo all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.\n\nIf you would like more information about this role, please contact Qualcomm Careers.\n