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· Extraction expert with 10+ years' experience. The candidate will be expected to perform Development/support for extraction solutions for gate level and/or transistor level to build high quality PDK on STARRC/QRC.
· Development/support of ICV/Calibre/Pegasus runset (rule deck) for parasitic extraction, correlate parasitic coming from different extraction flows, assume ownership of entire LVS/extraction flow, working closely with various design/development groups.
· Perform in a dynamic and challenging environment with drive and creativity. Candidate is expected to have great stake holder management and leadership skill.
· B.Tech or M.Tech with 10+ years of experience in runset development/QA on ICV/Calibre/Pegasus tools/flow.
· Expertise in Parasitic extraction tools like StarRC, QRC , xACT.
· Strong debugging and scripting skills.
· Working knowledge of layout editing tools like Cadence virtuoso/calibre Design rev/IC Work bench
· Understanding of Fusion compiler, Innovus and 3DIC flows is plus
· Strong team working and leadership skills.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Auto-Apply to Extraction Lead Jobs with your AI JobCopilot
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