Principal SOC DV Engineer

Create SoC Verification plan and develop C/SV based SoC verification tests Develop understanding on SoC and perform Processor based SoC verification and Emulation using C/SV Develop simulation FW and C test scenarios to verify system level use cases Develop SV/UVM monitors to measure performance and improve Verification Environment Develop SV/UVM monitors to measure performance and improve Verification Environment Develop Emulation environment / Flow to verify SoC E2E datapath scenarios Interact with Architecture/Design/FW teams to identify actual FW implementation and perform verification accordingly Develop flows to automate verification environment development and drive team Involve in MUB/Silicon Bring-up activity and support FW bring-up Involve in Vectors Bring-up activity and support ATE/Tester teams for Functional Characterization Utilize developed ASIC test FW on RTL simulations, Netlist simulations and Emulation platforms. Bachelors/Masters in Engineering. Minimum 8+ years of Processor based SoC verification experience with C tests. Minimum 4+ years of experience in SV / SVA Good understanding on Test controller / MBIST / DFT architecture Good understanding on ARC/ARM processor pipeline architectures. Good understanding on PCIE / NVME Architecture. Knowledge of industry standard interfaces, such as LPDDR, NAND, ONFI, AXI is an advantage. Proven experience in scripting languages such as Python / Perl / TCL Solid verification skills in problem solving, constrained random testing, and debugging. Good written and oral communication.