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Principle/Staff Datapath Engineer, Design"

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Job Description - Principle/Staff Datapath Engineer, Design"

Req. ID:\n\nJR93412 Principle/Staff Datapath Engineer, Design\"\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nJob Description: \n\nAs a Design Engineer for Non-Volatile Memory Datapath Functional Group at Micron, you will support design and validation activities of Datapath and DDR high-speed interfaces of Flash Memory (non-volatile memory) products. Prior experience in Plane Datapath Design is a plus. In this highly challenging role, you will be engaged in high-speed circuits block level and sub-system level design and timing optimization and supervising their layout.\n\nYou will be working with project teams to understand full chip floorplan and how to fit and place your circuits at full chip level. You will be also working with Application Engineering team to understand the new specs and translate them into circuit requirements.\n\nYou will also work with CMOS/modeling team to define CMOS characteristics to realize and enable high-speed circuits. In addition to design activities, you will be heavily engaged in high-speed circuits functional and timing validation from base cells all the way to full-chip level using wide variety of simulation tools such as HSPICE, Fast SPICE and NC Verilog.\n\nUsing \u0027Design/Verification + AI\u0027 accelerates the design process. So, you should be able to adept to \u2018Design + AI\u2019 approach with Novel ideas which improves the productivity/Performance.\n\nYou are also responsible for documenting block level and sub-system level Micro-Architecture Spec (MAS) in accordance with variety of industry standards such as ISO26262. A deep understanding and knowledge of high frequency digital, analog and mixes signal circuit design, CMOS device physics, CMOS circuits power consumption concepts and pipeline structures are necessary.\n\nSkills required: \n\n * Circuit design experience in analog/mixed signal CMOS circuits in deep sub-micron technologies (5 \u2013 40 nm) in High-speed Memory interfaces (DDR3/4/5, LPDDR3/4x/5, GDDR5/6) or SerDes. Having Plane Datapath design is a big plus. Candidate must have experience in Parallel or Serial Interface.\n * Knowledge of Power Delivery circuits such as Bandgap, LDO, Bias circuits and able to create block level specification based on link budget. Deep knowledge and understanding of high-speed digital, analog and mixed signal circuits.\n * Understanding of Mismatch analysis \u0026 Monte-Carlo methodology/sims, transistor level Circuit level noise analysis. Understanding of device physics \u0026 deep-sub micron issues.\n * Supervision of complex and/or sensitive analog layout and defining IP floorplan\n * Experience with industry standard tools such as Cadence ADE, Spectre, AMS verification, EM/IR flows, MATLAB, Calibre etc.\n * Working knowledge of Mixed mode simulation, Signal Integrity and ESD desired.\n * Knowledge of digital design using RTL. Should be able to create system level models using VerilogA/Python.\n * Deep knowledge of power consumption concepts and their trade-offs in CMOS circuits. Deep knowledge of CMOS device physics.\n * Strong verbal communication skills (English)\n * Interested and motivated to work as an engineer on sophisticated systems-level products\n * Ability to establish and maintain good relationships with colleagues\n * Individuals must have proven ability to achieve results in a fast moving, dynamic environment.\n * Self-motivated, self-directed, and a team player (on the same team and outside of the team).\n * M. TECH/PhD + 2 years or B.E/B. Tech + 5years of experience in semiconductor industry (Minimum.)\n\n\n\n\u200b\n\nJob Profile(s):\n\nSemiconductor Design Engineer 4\n\nRelocation level: (TBD)\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\n\u200b\u200b\u200b\u200b\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n
Original job Principle/Staff Datapath Engineer, Design" posted on GrabJobs ©. To flag any issues with this job please use the Report Job button on GrabJobs.
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