Req. ID:\n\nJR94216 Senior Analog Layout Engineer\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nRole and Responsibilities\n\n * Design and develop complex and critical analog, mixed\u2011signal, and custom digital layout modules.\n * Perform comprehensive layout verification including LVS, DRC, Antenna, PEX, Voltus, EMIR, and ensure comprehensive quality checks and documentation support.\n * Deliver block\u2011level layouts on time while maintaining high quality standards.\n * Chip area estimation, Floor-planning of moderately complex layout module and execution to meet overall project schedules.\n * Collaborate effectively with the cross-functional teams and demonstrate strong teamwork.\n * Communicate proactively with local engineering teams to ensure project success.\n\n\n\nQualifications / Requirements\n\n * Experience: 5\u20138 years of hands\u2011on experience in analog/custom layout design across advanced CMOS processes and technology nodes (5nm to 130nm).\n * Tool Expertise: Proficiency in Layout Design tools like, Cadence MXL / EXL / GXL / XL Or Any Industry standard layout design\n * Layout Verification and Sign-Off Tool: Cadence Voltus, Quantus; Mentor Graphics Calibre (DRC/LVS/xACT); Synopsys StarRC / R3D.\n * Layout Skills: Experience designing critical blocks such as LDOs, Bandgap references, oscillators, and reference generators.\n * Technical Knowledge: Strong understanding of analog layout fundamentals including matching, electromigration, latch\u2011up, coupling, crosstalk, IR\u2011drop, and parasitics.\n * Circuit Impact Awareness: Ability to evaluate layout impact on high\u2011speed performance, capacitance, power, and area.\n * Design Quality: Proven ability to interpret design constraints and implement robust, high\u2011quality layouts.\n * Problem\u2011Solving: Strong analytical skills for physical verification and debugging of custom layouts.\n * Mindset: Passion for continuous learning, innovation, and collaborative success.\n\n\n\nEducation\n\n * BE/B.Tech or M.Tech/M.S in Electronics / VLSI Engineering\n * Exceptional Diploma (3 Year program) holders in Electronics or VLSI Engineering will also be considered\n\n\n\nJob Profile(s):\n\nSemiconductor Design Engineer 3\n\nRelocation level: (TBD)\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\n\u200b\u200b\u200b\u200b\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n
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