STAFF ENG-HIG-HBM-LAYOUT

Req. ID:\n\nJR99662 STAFF ENG-HIG-HBM-LAYOUT\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nRole and Responsibilities\n\n * Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design\n\n * Perform layout verification like LVS/DRC/Antenna, quality check and documentation.\n\n * Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.\n\n\n\n * Lead the layout design and development of complex analog, mixed-signal, and digital blocks and full chip level integration\n\n * Ensure timely delivery of high-quality block-level layouts, meeting project milestones and design specifications.\n\n * Perform layout verification including LVS, DRC, and antenna checks, along with thorough quality reviews and documentation.\n\n * Collaborate with global engineering teams to ensure successful execution and integration of layout projects.\n\n * Provide technical guidance and mentorship to junior team members, reviewing sub-block layouts and supporting their development.\n\n * Demonstrate leadership in planning, time estimation, scheduling, and execution across multiple projects.\n\n * Contribute actively to project management and cross-functional coordination.\n\n * Proven experience in IC layout design with a systematic and methodical approach.\n\n * Strong attention to detail and a passion for high-quality design.\n\n * Excellent communication and collaboration skills, especially in a global team environment.\n\n * Ability to manage multiple priorities and deliver results under tight timelines.\n\n\n\n\nQualification/Requirements\n\n * Experience: 8\u201315 years in Memory /Analog/Custom layout design across advanced CMOS process nodes, including Planar and FinFET technologies.\n\n * Tool Proficiency: Strong expertise in Cadence VLE/VXL and Mentor Graphics Calibre for DRC/LVS verification is essential.\n\n * Technical Expertise: Hands-on experience in layout design of critical Memory /Analog and mixed-signal blocks such as:\n\n * Array Layout, Decoder, Control logic , IOs , PLLs , ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, and Differential Amplifiers.\n\n * Fundamentals: Solid understanding of Memory /Analog layout principles including bit cell , addressing , banking ,matching, electromigration, latch-up, coupling, crosstalk, IR-drop, and parasitic effects.\n\n * Design Awareness: Ability to assess and mitigate layout impacts on circuit performance\u2014speed, capacitance, power, and area.\n\n * Memory Architecture: Familiarity with design hierarchies and memory layout architectures is a plus.\n\n * Verification Skills: Strong problem-solving skills in physical verification and debugging of custom layouts.\n\n * Tapeout Experience: Prior involvement in multiple successful tapeouts is highly desirable.\n\n * Project Management: Proven ability to manage multiple layout projects, ensuring quality and timely delivery at all stages.\n\n * Communication: Excellent verbal and written communication skills, with the ability to collaborate effectively across global teams.\n\n\n\n\nEducation\n\nBE or MTech in Electronic/VLSI Engineering\n\nAll qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.\n\nJob Profile(s):\n\nSemiconductor Design Engineer 4\n\nRelocation level: (TBD)\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\n\u200b\u200b\u200b\u200b\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n