Physical Design Engineer

AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, Amazon Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services. Annapurna Labs, as part of AWS, is looking for talented engineers to help us develop a semiconductor platform based on revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. You’ll have the opportunity to work on the technologies that power the world’s largest cloud provider, in a dynamic, open, and fast-paced environment. Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
We are looking for talented physical design implementation engineers to join our excellent Physical Design team, which develops Amazon’s next generation of products for the cloud market.
To learn more about Annapurna Labs, you're welcome to watch the following videos from recent re:Invents: Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies. About the team
*Diverse Experiences
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BASIC QUALIFICATIONS

- Education: Electrical engineering (B.Sc)
- 4+ years of experience
- Understanding the entire physical design flow (“RTL to GDS”)
- Deep understanding of sign-off activities (timing and physical verification)
- Experience in advanced nodes technologies and Implementation tools
- Process and technology oriented
- Leadership and mentoring skills

PREFERRED QUALIFICATIONS

- Full-chip experience (floor plan, layout, timing)
- Previous experience in high-speed designs, multi-voltage (low power) designs

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