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Analog / Mixed-Signal IP DDR Design Engineer (Onsite) - Cork, Ireland

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Job Description - Analog / Mixed-Signal IP DDR Design Engineer (Onsite) - Cork, Ireland

Design goals include low-power and high speed analog mixed-signal designs for a wide array of Snapdragon SoC products. Architecture, design and development of high-speed mixed-signal circuits for LPDDR5, LPDDR6 and next-generation LPDDR systems Custom blocks include high-speed Rx / Tx, clock distribution, clocking delay elements (DLL/PLL), references blocks and band-gap circuits Circuit design for next-generation chip-to-chip architectures Custom schematic capture, SPICE analysis and exhaustive pre-silicon validation Post-silicon bringup support and system enablement Working closely with the Analog Mask Layout and Physical Design teams to deliver IP on the latest technology nodes Power Delivery and Signal and Power integrity Master's or Ph.D. degree in Science, Engineering, or related field 5+ years of transistor level analog mixed-signal design experience, preferably in high-speed wireline DDR, SerDes, PLL, or other high speed applications Experience in SPICE simulators and schematic capture tools Experience in designing op-amps, bandgaps, differential amplifiers, VCO, PLL, DLL Experience in high-speed DDR, SerDes or IO block level designs such as transmitters, receivers, high speed VGA, CTLE, CDR, etc. Understanding of signal integrity in high-speed wireline design is preferred Scripting and GenAI experience to automate circuit design and verification work is preferred Full-custom analog layout techniques and the ability to take a design and complete the layout extract verification and sign-off Excellent communication skills and ability to contribute strongly within a high-performance team Bachelor's degree in Science, Engineering, or related field. 3+ years ASIC design, verification, or related work experience. Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field. References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.
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