Principal Engineer Substrate and Defect Engineering

Job Description

In your new role you will:

• Act as a lead Defect Density (DD) Engineer for the Wide Band Gap (WBG) technologies.
• Provide expertise in defect density engineering to improve yield and stability of SiC and GaN technologies.
• Support ramp of high-volume manufacturing and ramp-up of Infineon's SiC cold split technology and WBG Epi manufacturing by implementing health of line monitoring and fast feedback mechanism to ensure stable performance.
• Analyses the defects originating from substrates and epi process block and drive for improvement with process integration, product engineering and unit process teams.
• Establish correlations between inline defect density scan with electrical parameters, yield, and reliability of products.
• Establish the Defect monitoring plan, out-of-control action plans, and DD targets.
• Establish Defect Pareto and carry out defect characterization and killing ratios.
• Drive continuous Defect Density baseline improvements and substrate/epi-to-product interactions.
• Conducts defect learning for existing and new technologies and products to establish the impact of defects on yield, reliability, and cosmetic appearance.
• Improves yield by reducing DD-related yield loss. Collaborate and closely work with process integration, unit process development and production wafer inspection teams to achieve the best performance of technologies and products.
• Provide input for SiC boules and substrate suppliers for quality improvement programs.
• Ensure process windows and implement fault detection and classification (FDC) limits for process and tool parameters to achieve early detection and excursion-free manufacturing.
• Ensure flawless process/tools change management for the technologies and products under responsibility.
• Support deviation management by defect assessment of affected material.
• Cost, quality, stability, and productivity improvement of the WBG technologies, products, substrate manufacturing and epi block.
• Act as an interface between substrate and Epi manufacturing site and substrate user sites.
• Support technology transfer and technology/product development to achieve best-in-class yield and ensure excursion-free manufacturing.

Your Profile

You are best equipped for this task if you have:

• Bachelor/Master/PhD Degree in Electrical/Electronics/Physics/Material Science/Chemistry/Mechatronics
• 10+ years experience in defect density (DD) and yield engineering in Frontend Wafer fab environment.
• Expertise in defect reduction and defect excursion prevention.
• In-depth know-how of state-of-the-art DD inspection tools, methods, and methodologies and emerging trends.
• Good understanding of substrate and epi-related defects and interaction with devices and yield.
• Experience with Wide Band Gap (WBG) semiconductors like SiC and GaN, substrate and epitaxial layer process would be an added advantage.
• Familiar with Technology and Products Transfers and Qualification methodologies
• Experience of ramping up technologies in high volume and New Products Introduction
• Experienced with quality and reliability requirements of Automotive and Industrial products.
• Good understanding of wafer fab High-volume Manufacturing Systems, Quality and Reliability requirements, and Failure Analysis
• Familiar with Change and Deviation management and problem-solving methodologies.
• Must be a self-starter who can work both independently and in groups.
• Able to lead, organize and coordinate multiple projects promptly.
• Ability to work with multiple teams and interfaces in a highly demanding, time-critical, and agile environment.

Benefits

What we offer you in Kulim

In our wafer production in Kulim we are producing more than 100.000 wafer each month.

inspection tools, yield engineering, defect density, substrate, epi