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Staff Electrical Validation Engineer page is loaded
In this position, you will be part of electrical validation team in Client Graphic and Artificial Intelligence group, focus on discrete graphic product validation.
You will lead the technical readiness in pre silicon phases and also validation activity in post silicon phase. Your responsibility include but not limited to:
Defines electrical validation strategy for IO interfaces to achieve optimized analog performance and meet product production goals. Validates circuit analog performance, electrical signal integrity compliance to industry standard specifications, and system level margin for stable operation and production target prediction.
Conducts and participates in multidisciplinary research in the design, development, testing, validation, and utilization of IO and mixed signal architectures inclusive of industry standard datacom applications and custom Intel interfaces
Develops procedures, analysis, and designs for validation, validation infrastructure, and systems margin validation.
Analyzes internal and external customer returns with emphasis on improving yields and driving test escape closure.
Applies and uses independent evaluation to select components and equipment based on analysis of specifications, performance, and reliability.
Performs debug to identify root causes and resolves all functional and triage failures for electrical issues.
Tests interactions between various electrical design features using validation infrastructure.
Applies understanding of DFT and DFM to collaborate with architecture, design, and pre-silicon validation teams to ensure capability to validate and test IO architecture implementations.
Prepares validation specifications, evaluates IP, and generates test reports.
Ensures products conform to standards and specifications.
1. Demonstrated leadership in any form of engineering discipline, good stakeholder management and influencing skill. Strategic thinker and passionate in challenge status quo.
2. Proven record in complex problem solving.
3. Possess solid analog circuit design or electrical validation experience .
4. Familiar with validation technique and electrical compliance requirement for either high speed serial bus or parallel bus.
5. Familiar with DFT methodology, tool and equipment used in EV environment.
6. Familiar with scripting for debug and automation need.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.Intel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please click here .
To view our candidate privacy notice, please click here .
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