ASIC Top Level Integration engineer

Ensure the top-level design meets key performance metrics, including timing, power, area, and other critical specifications. Collaborate closely with RTL, verification, and physical design teams to resolve integration challenges and provide valuable design feedback. Contribute to the review and refinement of integration plans, schedules, and deliverables to ensure smooth project execution. A BSc or MSc degree in Electrical Engineering, Computer Science, or a related field, with at least 8 years of experience in digital ASIC design and integration. Strong expertise in RTL stitching and integration, from IP to system-level SoC. Strong attention to detail and the ability to perform thorough technical analysis Excellent programming skills in System Verilog, VHDL, and scripting languages like Python, with experience in code repository management (Git, Perforce, Subversion). Familiarity with AMBA AXI and CHI protocols, and experience in developing and implementing AMBA-based on-chip interconnects to meet performance and system requirements. Good to have experience in Experience with continuous delivery and integration, DFT, synthesis, STA, UPF, or power-related design knowledge. ​What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. We encourage you to consider applying to jobs where you might not meet all the criteria. We recognize that we all have transferrable skills, and we can support you with the skills that you need to develop. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. learn more. Primary country and city: [[Sweden]] || [[Lund]] Primary Recruiter: [[Anitha Pulluru]] Hiring Manager: [[Anders Isaksson]]