Senior ASIC Design Lead in Lund/Stockholm:

Be responsible for Definition of ASIC System-on-chip (SoC) specific IP blocks and subsystems Support design team during development, verification and validation of the design Take full responsibility for design, being block or sub-system Break-down Requirements and create Architecture and Design Specifications Perform Digital Design, and run all RTL sign-off checks Review Verification and Design plans and specifications produced by other team members Populate Product Backlog, and prioritize work for yourself and team members Continuously improve and optimize ways of working Generate appropriate documentation Over 8 years of experience in ASIC design, verification, and advanced SoC development, with strong proficiency in System Verilog and AMBA-based designs. Hands-on experience with Cadence and Synopsys design suites, SpyGlass for IP sign-off, and formal verification methodologies. Proven technical leadership and a strong track record of cross-team and cross-site cooperation in delivering high-quality outcomes.. Commitment to quality-conscious design methodologies, with a focus on reliability and compliance. Master's Degree or PhD in Electronic Engineering, providing a robust foundation for innovative problem-solving. ​What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. We encourage you to consider applying to jobs where you might not meet all the criteria. We recognize that we all have transferrable skills, and we can support you with the skills that you need to develop. We truly believe that by collaborating with people with different experiences we drive innovation, which is essential for our future growth. learn more. Primary country and city: [[Sweden]] || [[Stockholm/ Lund]] Primary Recruiter: [[Anitha Pulluru]] Hiring Manager: [[Pierre Rhodin]]