Verification Engineer - Telecom

Your Role
We are looking for a Verification Engineer for our Telecom projects in Stockholm.

In this role you will play a key role in:
• Designing and implementing a thorough verification plan, including detailed specifications.
• Building and maintaining UVCs to ensure thorough design verification.
• Establishing testbench infrastructure and create test cases and sequences using UVM-SV (System Verilog).
• Utilizing advanced coverage techniques to achieve comprehensive verification.
• Executing and manage functional verification using coverage-driven methodologies.
• Debugging for TB, RTL and a verification environment.

Your Profile
• A master’s degree in Electrical Engineering, Computer Engineering, or a related field.
• Expertise in ASIC or FPGA verification at IP, sub-system, and chip levels using System Verilog UVM, with potentially 5-10 years of Verification experience.
• Hands-on experience in designing UVM test environments and achieving coverage closure.
• Proficiency in verification planning, testbench development, test case creation, functional coverage, and code coverage analysis.
• Experience in Perl, TCL.
• Experience working on different levels of ASIC Verification (IP/Subsystem/SOC Design).

What we believe you will enjoy about working here
• We recognize the significance of flexible work arrangements to provide support. Be it remote work, or flexible work hours, you will get an environment to maintain healthy work life balance.
• At the heart of our mission is your career growth. Our array of career growth programs and diverse professions are crafted to support you in exploring a world of opportunities.
• We support your personal development and offer an education library with more than 250 000 (!) courses and educations and certifications.

Application
As part of our recruitment process, identity verification or background checks may occasionally be conducted. 

Valid work permit for Sweden is required.

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