Manager, Field-Programmable Gate Array Engineer

Job Title: Manager, Field-Programmable Gate Array Engineer

Job Code: 36360

Job Location: Bristol, PA

Job Schedule: 9/80- employees work 9 out of 14 days, totaling 80 hours worked-and have every other Friday off

Job Description:
L3Harris Telemetry & RF Products in Bristol, Pennsylvania currently has an opening for an Associate Manager, Digital Hardware Engineer.  In this role, you will develop digital designs for data acquisition and telemetry products.  Responsibilities will include generation of specifications, component selection, high-speed digital circuit design, FPGA coding, simulation, and analyses, support of PWB layout, and integration & verification testing.  Additionally, this role will serve as the electrical engineering site leader with 8-14 direct reports over multiple facets of Electrical and Software Engineering.  Management responsibilities include but are not limited to: annual evaluations, program staffing, mentoring, and financial reporting on efforts covered by the direct staff.

Essential Functions:

• Generate design concepts and architectures to satisfy performance requirements


• Design sub-systems and modules, with emphasis on digital circuits and FPGA code, coordinating integration with Analog, RF, Software, and Mechanical Engineering disciplines


• Decompose and allocate system and box-level requirements to FPGA specifications.


• Architect solutions targeting FPGAs against requirements and implement those solutions on FPGA platforms.


• Map FPGA simulation work products to system-level requirements and capabilities


• Review product specifications, and generate system and module-level block diagrams, flow diagrams, and design concepts


• Refine and enforce consistent firmware development processes across FPGA designs.


• Lead teams of engineers generating the FPGA design solutions.


• Ensure the FPGA simulations verify performance, then integrate and test the FPGA on the circuit card assembly.


• Lead the full life cycle development and integration of VHDL into different families of FPGAs.


• Experience coding in VHDL and modeling algorithms, simulating, and integrating multiple FPGA-based modules


• Lead the bench-level system integration with hardware, software, and other FPGA designs


• Support proposal efforts and early stages of the program to define detailed system requirements 


• Support the planning and execution of project plans, design reviews and production release of modified or new product documentation


• Support qualification and production test in the event of test failures


• Support customer with use and troubleshooting of fielded products


• Provide mentoring to younger engineers


• Ability to obtain a US Secret Clearance

Required Qualifications: 

• BS Degree in electrical/computer engineering and 9+ years of professional experience, a Masters in electrical/computer engineering and 7+ years of professional experience, or 13+ years of related experience without a degree.

Preferred Additional Skills:

• Minimum of 4 years of experience with and understanding of Altera, Microchip or Xilinx FPGA architectures


• Minimum of 4 years of experience with SoC (Kintex UltraScale/UltraScale+, Virtex UltraScale/UltraScale+, Zynq UltraScale)


• Minimum of 4 years of experience with legacy FPGA series chips including Spartan-6 and Cyclone III


• Minimum of 4 years of experience with ISE, Vivado, Libero and / or Quartus design tool sets


• Minimum of 4 years of experience with VHDL


• Minimum of 4 years of experience circuit design and schematics in ORCAD Capture


• Previous experience in the field of Flight Test Telemetry and Flight Safety SystemsPrevious experience in a functional leadership role or team leadership


• Ability to multi-task and prioritize assignments in a fast-paced work environment and to complete design/project goals with minimal oversight and direction.

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