ASIC Design Engineer

Motivated ASIC design engineer contributing as a member of the IC development team
This position is part of the RF Cellular IC Division in San Diego, CA
Product focus on wireless radio transceivers for cellular handset platforms
Experience in wireless communications is required.
Responsibilities

Design and implement digital logic for RFIC control/interface, calibration, digital front-end/DSP, and high-speed LVDS interface
Develop and execute test plans for pre-synthesis verification
Support lab debug, test, and characterization of digital systems
Write technical documentation for systems and blocks designed
Strong background in RTL design with Verilog/SystemVerilog required
Strong background in middle-end design, including constraint specification, STA, formal equivalency, synthesis, and ATPG required
Familiarity with low-power design and DFT techniques required
Familiarity with DSP techniques including but not limited to filter design and rate conversion preferred
Familiarity with RF system specifications such as EVM, spectral characteristics, etc preferred
Experience

MSEE or BSEE with equivalent work experience required
Strong background in wireless communications systems required
Must possess a thorough understanding of digital design and development techniques and potential design issues
Must be strongly motivated and able to work independently to accomplish tasks with minimal supervision
Must be able to work well with teammates, strong communication skills required

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