ASIC Engineer 4

Design, analyze, and implement digital circuits used in the development of memory products. Contribute to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Provides chip floor-planning, physical design, IP integration, static timing analysis, design validation, and required tape-out revisions. Implement and manage the layout process including floor-planning, placement, routing, physical verification, and final signoff for tapeout. 1. IC Place and Route 2. Static timing analysis 3. Chip floor planning 4. Custom flow support (Tcl based) 5. Cadence tools: Innovus and Tempus 6. Optimization of memory, logic, and analog circuits We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your right to work click here. AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.