DDR Applications Engineer

Core Responsibilities:

As a DDR Applications Engineer you will be involved with customer interfacing on all phases of phy and controller design of high performance ddr interface from RFQ, RTL to delivery of our final GDSII. Your responsibilities include but are not limited to:

• Technical interface with customers and solving problems


• Considering optimal solutions and help internal/external teams


• Work closely with PD teams to implement PHY design into GDS.

Qualified Candidates must possess:

• Bachelors/Masters degree plus 7+ years SoC design and/or applications engineering experience.  The ideal candidate will have minimum 5 years of DDR PHY Design experience on high performance , low power SOC designs


• Technical knowledge with DDR Protocols, Specification, Design, Verification, and implementation.


• ASIC design experience with Simulation/Verification and RTL Synthesis is required.


• Experience with advanced technology processes (40nm/28nm/20nm) circuit design


• Relevant experience in implement or technical support mixed signal design is highly desired.


• Hardware debug and troubleshooting skills are highly desirable


• Knowledge of competitive EDA tool products and product knowledge in any of the areas of P&R, Physical Verification, Signal Integrity is highly desired.


• Knowledge about industry standards and practices in Phy Design, including RTL writing, verification tools of RTL.


• Experience in developing and implementing DDR PHY


• Solid Understanding of all aspects of PHY construction, Integration and Physical Design


• Working knowledge of Basic SoC Architecture and Power user of industry standard RTL Design & Synthesis tools, proficient in STA methodology and tools.


• Knowledge of circuit design, transistor operation is a plus.


• Solid Understanding of scripting languages such as Perl/Tcl desired.


• Good understanding of Design methodology to debug issues at phy level


• Lab experience with silicon bring-up and reference board characterizations and demos


• Detailed understanding of DDR interfaces as it applies to I/O connectivity and trends.


• Ability to assess the impact of standards coming from JEDEC and other standard organizations.


• Must have excellent organization skills, strong communication skills and ability to interact with customers. Excellent presentation, communication & documentation skills, demonstrate effective teamwork with engineering, sales and operations teams.


• Proven track record in meeting tight schedules and handling multiple projects concurrently.