Emulation Engineer

Job Details:

Job Description:

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Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our

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This position is for a role in Intel Atom Processor development team in Austin, TX. Intel Atom Processors have been integral part of all Intel consumer and server products that serves many markets including Cloud Computing, Networking, Automotive and Machine learning/AI. Our team is responsible for design and verification for Intel Atom C Series and P Series processors.

Responsibilities Include but not limited to:
Creating emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools.
Defining and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model.
Testing and debugs the emulation/FPGA model and collaterals.
Defining and develops new capabilities and HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation.
Developing improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. Interfaces with and provides guidance to pre-silicon Validation teams for optimizing preSi validation environments, test suites and methodologies for emulation efficiency.
Developing and applies automation aids, flows and scripts in support of emulation ease ofuse and improvement of equipment utilization.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications
Candidate must have a Master’s degree or PhD in Computer/Electrical Engineering or related field and 3+ years of Industry experience; or bachelor's degree and 4+ years of industry experience in a relevant area.
2+ years of experience in one or more of the following:
- Computer Architecture
- Digital Design or Data structures
- x86 architecture and power management
- Python / Perl and C/C++
- Verilog / VHDL

Preferred Qualifications
3+ years of experience in one or more of the following:
- Data structures
- Debug of hardware / embedded systems
- x86 assembly level programming
- Hands on development experience in Perl or Python
- Hands on development or debug of either RTL designs or testbench
- Emulation using Synopsys, Mentor Graphics or Cadence platform

Job Type: Experienced Hire

Shift: Shift 1 (United States of America)

Primary Location:

US, Texas, Austin

Additional Locations:

Business group: In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.

DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.

As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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