FPGA / ASIC Verification Engineer

ROLE OVERVIEW:

A leading technology organization is seeking an FPGA / ASIC Verification Engineer to support the development of secure, next-generation communication systems used in mission-critical environments.

This role focuses on verifying embedded FPGA firmware for advanced radio communication systems. You will work within a collaborative engineering team using modern, coverage-driven verification methodologies to ensure high-performance and reliable designs.

This is a hands-on opportunity to deepen your expertise in UVM, SystemVerilog, and complex embedded systems while contributing to impactful technology.

KEY RESPONSIBILITIES:

• Perform FPGA verification and validation for embedded communication systems
• Develop high-level and detailed verification plans aligned with system requirements
• Create self-checking test benches using SystemVerilog within a UVM framework
• Develop verification components including agents, sequences, covergroups, predictors, and scoreboards
• Design and execute randomized and directed tests to achieve functional coverage goals
• Analyze requirements and ensure designs meet performance and functional specifications
• Collaborate with cross-functional teams to define and validate product requirements
• Participate in design and implementation reviews and present technical updates
• Identify and resolve design and verification issues throughout development
• Support continuous improvement of verification processes and methodologies
• Ability to obtain and maintain a U.S. Security Clearance

QUALIFICATIONS:

• Bachelor's degree with a minimum of 6 years of relevant experience, or
• Graduate degree with a minimum of 4 years of relevant experience, or
• 10 or more years of related experience in lieu of a degree
• Experience developing and verifying FPGA or ASIC-based embedded systems
• Strong understanding of coverage-driven verification methodologies

PREFERRED QUALIFICATIONS:

• Experience debugging FPGA firmware and related hardware issues
• Knowledge of Ethernet standards and packet processing
• Experience with cryptographic algorithms and secure communication systems
• Familiarity with Mentor Graphics verification tools
• FPGA or ASIC RTL design experience
• Proficiency in object-oriented programming languages such as C++ or Java
• Strong experience with SystemVerilog and UVM or OVM methodologies
• Experience with functional coverage analysis tools
• Familiarity with scripting languages such as Python, Bash, Perl, or Tcl
• Experience working in Linux environments
• Knowledge of industry-standard interfaces such as Ethernet, AXI, and SPI
• Strong technical writing and communication skills
• Self-motivated with the ability to work effectively in team environments

COMPENSATION:

In compliance with New York pay transparency requirements, the salary range for this position is $100,000–$145,000. Final compensation will be determined based on experience, skills, and qualifications.

EQUAL OPPORTUNITY STATEMENT:

Nova Talent Solutions partners with clients who are committed to equal employment opportunity. All qualified applicants will receive consideration for employment without regard to any protected characteristic in accordance with applicable laws and regulations. BJ