Hardware Engineering and R&D - Hardware Design Engineer 5

Job Title: Hardware Design Engineer 5Job Location: Mountain View CAJob Duration: 6 Months on W2 (Possible extension)

Summary:

The main function of Hardware Design Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.

Job Responsibilities:

SV/UVM fluencyBuild/enhance verification testbench and UVC components, monitors/scoreboards, sequencesWrite UVM testsImplement functional coverage codeC/C++-based test writing for embedded CPUs, eg. ARM, RISC-V, Tensilica, etc...Close code and functional coverageAMBA or OCP bus protocol experienceUnix environment and Scripting experienceMaturity/integrity/self-sufficiency to drive regression and drive issues to closure

Education/Experience:• Bachelor's degree in engineering required.• 10+ years experience required.

Candidate Requirements•

Years of Experience Required:

10+ overall years of experience in the field.•

Degrees or certifications required:

Looking for actual experience - degree is less important, however a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related degree would be relevant.•

Disqualifiers:

Candidates with history of short-term contracts / job hopping will not be eligible for the role.•

Best vs. Average:

The ideal resume would contain someone who has worked for *** before and has UVM and C/C++ skillset.Projects are less important to the sponsor as technical skills are needed.• Close code and functional coverage• AMBA or OCP bus protocol experience• Unix environment and Scripting experience

Top 3 Hard Skills Required + Years of Experience1. Strong UVM experience (8+ YOE)2. Strong C/C++ experience (for test writing for embedded CPUs, eg. ARM, RISC-V, Tensilica, etc) (8+ YOE)3. Unix environment and Scripting experience (8+ YOE)
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