Req ID:\n\nJR91631 MTS Digital Design Engineer, HBM\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nMicron\u2019s HIG HBM Digital Design Group is seeking a Digital Design Engineer to contribute to the architecture, RTL development, verification, and delivery of high\u2011performance digital logic blocks for advanced HBM memory products.\n\nIn this role, you will translate specifications into robust Verilog/SystemVerilog RTL, evaluate design tradeoffs across power, performance, and area, and apply strong fundamentals in digital logic, computer architecture, and low\u2011power methodologies. You will collaborate closely with verification, physical design, DFT, CAD, and system architecture teams to deliver high\u2011quality, well\u2011documented digital designs. Success in this role requires strong technical communication skills, a proactive approach, and the ability to excel in a fast\u2011paced, highly collaborative engineering environment.\n\nResponsibilities\n\n * Drive all stages of the digital design flow, including concept definition, specification, RTL implementation, verification support, documentation, and post\u2011silicon debug.\n\n * Develop high\u2011quality RTL in Verilog/SystemVerilog using scalable, parameterized design techniques aligned to architectural specifications.\n\n * Define and refine micro\u2011architecture for digital logic blocks, including FSMs, datapaths, FIFOs, pipelines, and arbitration logic.\n\n * Analyze tradeoffs across area, power, latency, and throughput, providing clear documentation and communication of design decisions.\n\n * Perform CDC/RDC analysis, apply sound clocking and reset strategies, and identify early timing challenges.\n\n * Support synthesis and static timing analysis by creating and debugging SDC constraints, and interpreting timing reports.\n\n * Apply low\u2011power design methodologies including CPF/UPF, clock gating, multi\u2011domain partitioning, and isolation/level shifter strategies.\n\n * Collaborate with verification, DFT, physical design, and CAD teams to ensure robust design closure and high coverage, including scan/ATPG readiness and functional/formal verification support.\n\n\n\n\nQualifications\n\n * Bachelor\u2019s degree in Electrical Engineering with strong understanding of computer architecture (3\u20135 years relevant experience).\n\n * Sophisticated RTL design proficiency using Verilog/SystemVerilog with experience translating specifications into maintainable micro\u2011architecture and RTL.\n\n * Strong understanding of digital logic fundamentals including FSMs, pipelines, datapath/control partitioning, and buffering/flow control structures.\n\n * Experience with synthesis, STA, CDC/RDC analysis, and development of timing constraints.\n\n * Proficiency in Linux environments with scripting skills (Python and/or Perl) to automate design flows and improve productivity.\n\n\n\n\nPreferred Qualifications\n\n * Master\u2019s degree in Electrical/Computer Engineering with 5\u201310 years of related experience.\n\n * Knowledge of memory system concepts (DRAM/SRAM/eFuse), ECC/CRC techniques, and DFT methodologies including memory/logic BIST.\n\n * Experience with AMBA/AXI/APB or comparable bus protocols, and working with custom or third\u2011party macros using behavioral and timing models.\n\n\n\n\nJob Profile(s):\n\nSemiconductor Design Engineer 5 - Semiconductor Design Eng MTS\n\nRelocation Level: TBD\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n\nTo learn about your right to work click here.\n\nFor US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron\u2019s People Organization at
[email protected] or 1-800-336-8918 (select option #3)\n