MTS Memory Sustaining Design Engineer, HBM

Design, layout, and optimize Memory, Logic, and Analog circuits for HBM products. Model parasitics and support design validation, reticle experiments, and tape-out revisions. Collaborate with layout teams to meet floorplanning, placement, and routing goals. Simulate and verify designs using tools like FINESIM, HSPICE, and Verilog. Analyze and optimize power delivery networks extensively. Run design checks before initial and revision tapeouts. Identify and resolve design issues to improve performance and reduce power. Debug pre-silicon and post-silicon issues in current HBM products. BS or MS in Electrical Engineering or related field. 12+ years (BS) or 10+ years (MS) of relevant experience. Strong CMOS circuit design skills and understanding of semiconductor device physics. Experience with schematic entry, Verilog, FastSpice, and HSPICE simulations. Deep knowledge of DRAM operation, JEDEC specs, and HBM product family. Strong communication skills to convey complex technical concepts. Experience with scripting languages (Python, TCL, Perl). Proven innovation and problem-solving in high-performance memory development.