Collaborate with multi-functional teams to resolve parametric test issues and drive continuous improvement. Review all PARAM items (CSPL/CPL/CTQ) for new device IDs and validate programs for release. Verify layout accuracy for PARAM WB revisions and maintain baseline programs. Develop engineering programs for evaluation and tool capacity assessment, including test time modeling and reduction strategies. Maintain GeRM test programs and libraries at required sampling rates. Update business processes and change documentation (PCN/GCP). Support internal and external audits, including corrective and preventive action implementation. Mentor engineers and actively participate in PARAM knowledge exchange groups. Bachelor's degree in Electrical Engineering, Physics, Materials Science, or related field. Proficiency in parametric test systems (e.g., GeRM), statistical analysis tools, and automation frameworks. Familiarity with device physics, semiconductor process flows, and failure analysis techniques. 3+ years of experience in semiconductor parametric testing or process engineering Internship or project experience in semiconductor or electronics industry 1-3 years of experience with inline and final parametric testing strategies. Knowledge of ISO standards and audit procedures. Certification in quality engineering (e.g., ASQ CQE)
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