Principal Layout Designer, HIG

Design and verify all levels of analog and digital layout. Use computer‑aided design software such as Cadence and Calibre. Collaborate with Design Engineers to floorplan and design layout. Understand and follow verification protocols. Apply custom and automated layout techniques for pitch, array, and peripheral layout of digital and analog circuits. Organize, prioritize, and manage logistics and resource allocations for project execution. Prioritize tasks to meet schedules and deadlines. Proactively develop methodologies to resolve layout and design issues and guide layout designers for professional and technical growth. Ability to translate schematics into layout suitable for fabrication reticules. Understanding of various circuit design protocols for both digital and analog circuits. Knowledge of different fab processes, mask generation techniques, and tapeout processes and procedures. Ability to collaborate with Design, Process Integration, CMOS, and other engineering teams. Capability to meet all engineering and process criteria required for assigned DRAM products. Experience applying fab process knowledge, including Design for Manufacturing (DFM). Understanding of Optical Proximity Correction (OPC). Basic understanding of circuit design and layout methodology through engineering interface.