Principal SoC DFT Engineer, HBM

Req ID:\n\nJR97969 Principal SoC DFT Engineer, HBM\n\nOur vision is to transform how the world uses information to enrich life for all.\n\nMicron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.\n\nAs a Principal SoC DFT Engineer within the Heterogeneous Integration Group (HIG), you will be responsible for the DFT architecture, implementation, and signoff of complex HBM base-die System-on-Chip (SoC) designs. This role is part of the SoC execution team, working closely with RTL design, verification, physical design, and product engineering to ensure robust, scalable, and manufacturable test solutions from pre-silicon development through tapeout and product bring-up.\n\nResponsibilities will include, but are not limited to:\n\n * Own SoC-level DFT implementation, including scan, MBIST, LBIST (as applicable), boundary scan (JTAG), and test access architectures for HBM base-die designs.\n * Drive DFT architecture definition early in the design cycle, ensuring alignment with SoC integration, floor planning, timing, power, and physical design constraints.\n * Implement and integrate DFT logic at the block, subsystem, and full-chip levels, working closely with RTL and integration teams.\n * Own DFT flow execution and signoff, including lint, CDC, DFT rule checks, ATPG readiness, and coverage closure.\n * Collaborate with physical design teams to ensure DFT solutions are optimized for placement, routing, timing closure, and DRC/LVS signoff.\n * Work closely with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, and smooth silicon bring-up.\n * Support pre-silicon debug of DFT-related issues and assist with post-silicon bring-up and yield/debug analysis.\n * Partner with CAD and methodology teams to define, improve, and standardize DFT flows across HBM SoC programs.\n\n\n\nRequired Experience\n\n * Bachelor\u2019s degree or higher in Electrical Engineering, Computer Engineering, or related field.\n * 7+ years of relevant experience in SoC design, DFT, or implementation for complex digital ASICs or SoCs.\n * Job title and level can scale depending on experience and qualifications.\n\n\n\nSuccessful candidates for this position will have:\n\n * Experience with scan insertion, MBIST/LBIST architectures, JTAG/boundary scan, and ATPG concepts.\n * Familiarity with full RTL-to-GDS SoC flows, including interaction between DFT, synthesis, STA, and physical design.\n * Experience working with large, complex SoCs involving multiple IPs and subsystems.\n * Proficiency with industry-standard EDA tools from Siemens, Synopsys, and/or Cadence for DFT and implementation.\n * Familiarity with scripting languages (Python, Tcl, Perl, etc.) for flow automation.\n\n\n\nJob Profile(s):\n\nSystems Design Engineer 4 - Systems Design Engineering MTS\n\nRelocation Level: TBD\n\nBefore Getting Started \nPlease review Micron\u2019s Internal Job Application Policy on your regional PeopleNow Career Opportunities page before searching and applying for jobs. Note in particular that: \n\n * Hiring managers may view your performance appraisals, original resume, transcripts or other performance-related documentation in your personal file. This information will be held in confidence.\n * If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.\n\n\n\nThe US base salary range that Micron Technology estimates it could pay for this full-time position is:\n\n$146,000.00 - $309,000.00 a year\n\nAdditional compensation may include benefits, bonuses and equity. \nOur salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. \n \nPlease note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.\n\nAs a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on Benefits | Micron Technology, Inc\n\nMicron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.\n\nTo learn about your right to work click here.\n\nFor US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron\u2019s People Organization at [email protected] or 1-800-336-8918 (select option #3)\n