Process Integration Engineer - DRAM R&D

Architect and optimize advanced capacitor process flows, including build rules and electrical/mechanical performance specifications. Resolve multi-module integration issues involving interactions across Photo, Etch, Materials, Device, and Cell. Drive continuous improvement in capacitor-related benchmarks, such as Cs uniformity, leakage, TDDB, and long-term reliability. Develop and complete structured DOEs to support technology learning, defect reduction, and performance improvement. Coordinate cross-site technology transfers across R&D, pilot, and high-volume manufacturing locations, ensuring robust module qualification. Support early-stage pathfinding and development of new architectures for future capacitor scaling. Benchmark industry trends in capacitor engineering, materials, and integration strategies. Foster a culture of innovation, technical rigor, learning, and operational excellence within the Capacitor team and broader DRAM PI community. MS/PhD in Electrical Engineering, Microelectronics, Materials Science, Chemical Engineering, or related field (PhD or equivalent experience preferred). 5+ years in the semiconductor industry, specializing in process integration, capacitor development, or dielectric integration. Proven expertise in MIM capacitor engineering and next-gen dielectric solutions. Experience in developing capacitor processes from R&D through pilot/higher-volume ramp stages. Proficiency in data analytics, statistical methods, and complex problem-solving. Demonstrated leadership, clear communication skills, and effective cross-functional collaboration. Experience with advanced capacitor materials, dielectric integration, and roadmap development. Deep understanding of DRAM module interactions and system-level integration behavior. Recognized for innovation, adaptability, and strong ownership in solving emerging challenges.