Senior ASIC Design Engineer | Custom ASIC & SoC Development | San Jose, CA
Our client, a cutting-edge developer of custom ASICs and SoCs for emerging technologies, is seeking an experienced Senior ASIC Design Engineer to join their innovative team in San Jose, California. This is an exceptional opportunity for a seasoned semiconductor engineer with expertise in ARM-based system architecture, security features, and full ASIC/SoC lifecycle ownership. The ideal candidate will bring a stable career history, strong customer-facing skills, and a proven track record in ASIC design from concept to production. Experience in agile, fast-moving environments, along with exposure to chiplet architectures and datacenter applications, is highly desirable.
Key Responsibilities
Lead end-to-end ASIC/SoC architecture and micro-architecture development from initial concept through production tape-out
Partner directly with customers to gather requirements, refine specifications, and ensure successful project delivery
Drive technical design reviews, create comprehensive documentation, and support verification and validation efforts
Provide technical leadership and expertise in security architecture, debug features, and RAS (Reliability, Availability, Serviceability) implementation
Collaborate cross-functionally with engineering teams to maintain technical alignment throughout the ASIC development lifecycle
Mentor junior engineers and contribute to best practices in semiconductor design methodologies
Required Qualifications & Skills
Technical Expertise:
Security Architecture: Deep knowledge of SoC security implementation in ARM-based systems, including hardware Root-of-Trust (RoT), Secure Boot architecture, ARM TrustZone technology, MMU/MPU configuration, cryptographic engine integration, secure debug interfaces, True Random Number Generators (TRNG), OTP/fuse programming, and tamper detection mechanisms
Debug & Trace: Extensive experience with ARM CoreSight debug architecture, trace components (ETM, ITM, STM), external debug interfaces (JTAG, SWD), debug software tools, and secure debug methodologies
RAS Features: Hands-on experience implementing ARM Reliability, Availability, and Serviceability features including error detection and correction (ECC), error reporting and poisoning protocols, fault injection testing, and interconnect/fabric error management
Proven experience owning complete ASIC/SoC projects from specification through silicon validation
Proficiency in RTL design, synthesis, and timing closure for complex digital systems
Strong understanding of low-power design techniques and clock domain crossing
Education & Experience:
Bachelor's degree in Electrical Engineering or Computer Engineering required
Master's degree or PhD in Electrical Engineering strongly preferred
Senior-level experience (8+ years) in ASIC/SoC design and architecture with demonstrated project leadership
Stable employment history with progressive responsibility in semiconductor development
Experience working in small, entrepreneurial companies or fast-paced development environments preferred
Exposure to chiplet architectures, 2.5D/3D integration, and datacenter or high-performance computing applications is a plus
Professional Skills:
Excellent verbal and written communication skills with ability to present complex technical concepts clearly
Strong customer-facing skills and experience interfacing directly with clients and stakeholders
Proven ability to work independently and as part of small, collaborative teams
Self-motivated with strong problem-solving abilities and attention to detail
About San Jose, California
San Jose is the vibrant heart of Silicon Valley and the third-largest city in California. Known as the global capital of technology and innovation, San Jose offers an unparalleled ecosystem for semiconductor professionals. The city boasts year-round pleasant weather, diverse cultural experiences, world-class dining, and easy access to both the San Francisco Bay Area and the natural beauty of the Santa Cruz Mountains. With its thriving tech community, excellent schools, and abundant recreational opportunities, San Jose provides an ideal environment for career growth and quality of life.
Why This Is a Great Opportunity
Join a leading custom ASIC and SoC development company at the forefront of semiconductor innovation. This position offers the rare opportunity to work on cutting-edge technology projects for top-tier companies across multiple industries. You'll be a key contributor working on the complete project lifecycle—from initial concept and architecture through tape-out and silicon bring-up.
This role provides:
Meaningful individual impact as a real technical contributor, not just another team member
Direct involvement in groundbreaking ASIC/SoC projects with emerging technologies including chiplets and advanced packaging
Opportunity to work independently or as part of a small, highly skilled team
Continuous exposure to diverse projects and new technical challenges
Competitive compensation package with annual salary ranging from $180,000 to $230,000, commensurate with experience
Professional growth in a dynamic environment that values innovation and technical excellence
Apply Today
If you are a talented Senior ASIC Design Engineer with expertise in ARM-based security, debug, and RAS architectures, and you're ready to take on challenging custom semiconductor projects from concept to completion, we want to hear from you. This is your opportunity to join an innovative team developing next-generation ASICs and SoCs for industry-leading companies. Qualified candidates are encouraged to apply today and become part of a company where your contributions truly matter.
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