Senior Engineer - HIG HBM PSE - Design Validation

Interpret JEDEC HBM specifications and develop internal architectural and design documentation. Understand and evaluate HBM schematics, layouts, and microarchitecture. Perform silicon bring-up and complete validation plans for HBM builds. Debug hardware and software interactions using lab instrumentation and analysis tools. Conduct circuit simulations and analyze validation data to identify root‑cause issues. Collaborate closely with design, test, product engineering, and manufacturing teams. Support qualification activities and product readiness for volume production. Contribute to continuous improvement of validation methodologies and workflows. Bachelor's degree or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, or related field. Experience with schematics, simulation, data analysis, or lab‑based debug. Strong analytical and problem‑solving skills. Ability to work effectively within collaborative teams composed of multi-functional engineering members. Demonstrated ability to manage time and maintain productivity. Coursework in VLSI, semiconductor processes, or computer architecture. Experience with Python, C/C++, or HDL languages (Verilog, VHDL, SystemVerilog). Demonstrated innovation, curiosity, and eagerness to improve tools, processes, or product quality.