Senior Optical Transceiver Design Engineer

Define and architect optical interconnect solution modules (200G/lane and beyond) aligned with product-level requirements. Lead hardware design optical interconnect solution and customer related demo to validate platform solution, including PCB design, schematic capture, and component selection. Guide layout engineers to complete PCB layout that meets mechanical, signal integrity, thermal, and manufacturing constraints. Define and optimize signal integrity (SI) for 200G/lane and beyond, covering high-speed SerDes, channel modeling, and link margin analysis. Develop robust power delivery network (PDN) solutions for high-density, high-speed optical/electrical systems. Collaborate with optical, packaging, thermal, and system engineers to co-design solutions that balance performance, power, and cost. Lead technical validation, bring-up, and performance optimization of CPO modules Support design validation, qualification, and root-cause analysis during development and production ramp. Stay current with and implement relevant industry standards (IEEE, MSA, CMIS, etc.). Contribute to automation of transceiver performance testing using Python, C++, or LabVIEW. You should have System-level understanding of current and emerging optical transceiver architectures and standards, And strong problem-solving skills and collaborative, proactive attitude. PCB schematic design and layout review for optical modules. High-speed opto-electrical system design, including DSPs, power rails, and microcontroller interfaces. MSA and IEEE standards for optical transceivers and other interconnect standard (e.g., QSFP, OSFP, CMIS, NVlink, UCIe). Skilled in using lab equipment including DCA-X, BERT, real-time oscilloscopes, OSAs, and optical power meters Strong Python scripting skills for test automation and data analysis Solid understanding of SerDes tuning, including eye diagram analysis, jitter characterization, and electrical compliance Experience working on both the optical module side and the host/system side of high-speed links