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Sr ASIC Physical Design Engineer

Job Description - Sr ASIC Physical Design Engineer

Description

Nokia of America CorporationSr ASIC Physical Design Engineer (Multiple Positions), Sunnyvale, CA. 



Responsibilities
  • Support specification, design, and implementation of digital hardware, applying design targets related to cost, yield, and reliability. 

  • Deliver hardware and software build-controlled productions releases, including EG main and update releases, service packages, maintenance updates, and customer design engineering. 

  • Manage product hardware and software evolutions through creation and release of documentation, change control management, and supplier and customer notifications. 

  • Participate in process and tool improvement initiatives. 

  • Maintain technical and design knowledge for assigned products and technologies. 

  • Ensure application and maintenance of quality engineering standards. 

  • Troubleshoot electronic engineering problems and apply the software care process when needed. 

  • Provide technical guidance and act as a subject matter expert to organization units and lower-level support teams. 

  • Determine project needs, including resource management and work allocation. 

  • Confer with customers to manage technical requirements. #LI-DNI 

 



Qualifications

Bachelor’s degree in Computer Science, Electrical Engineering, Electronic Engineering, or a related field, and 7 years of related work experience (5 years of which must be postbaccalaureate, progressive related work experience). 

Alternatively, will accept a Master’s degree in Computer Science, Electrical Engineering, Electronic Engineering or a related field, and 5 years of related work experience.

 

  • Must have 5 years of experience in physical design engineering;

  • Must have 5 years of experience utilizing digital design and CMOS technology;

  • Must have 5 years of experience in physical design flow, including: synthesis and floorplanning, placement, routing, clock tree synthesis, and physical verification;

  • Must have 5 years of experience using EDA tools, including Cadence Innovus, Synopsys IC Compiler, or Mentor Graphics Olympus;

  • Must have 5 years of experience using TCL, Perl, and Python in programming for scripting and automation;

  • Must have 5 years of experience using static timing analysis (STA) and power analysis tools and methodologies;

  • Must have 5 years of experience using Verilog HDL; and

  • Must have 5 years of experience integrating third-party IP and working with advanced process technologies, including TSMC 5nm and 3nm Technology nodes.

 

Telecommuting permitted from a location within commuting distance of Sunnyvale, CA up to 2 days per week. Employer will accept any suitable combination of education, training, or experience.

 

TO APPLY: Email CV to [email protected] with Job Code CA26-2508626 in subject line.

If offered employment, must have legal right to work in the U.S. EOE. Nokia of America Corporation offers a comprehensive compensation and benefits package: https://www.nokia.com/careers/our-locations/united-states/. 

 



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