Lead effective DRAM node transfers from TD or other HVM fabs to ID1 Drive module‑level process integration improvements for yield, quality, cost, and line stability Coordinate resources, schedules, and milestones across sending and receiving sites Collaborate with HVM, ADT, TD, Central Teams, other fabs, and external groups to align on strategy and BKM adoption Develop and grow the PIE team through performance management, talent planning, and career development 10+ years semiconductor experience in Process Integration, Yield Enhancement, Product Engineering, Design, or Unit Process Development Deep understanding of DRAM process flow Experience leading an engineering team (5+ direct reports) Demonstrated success resolving complex technical issues Ability to think and communicate clearly in urgent or high‑pressure situations Experience in DRAM TD, HVM, or transfer teams Experience with other memory technologies or logic/foundry environments Proven experience driving cross‑site standardization or BKM deployment
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