Sr System Design Engineer

Compose, build, and debug custom bench setups, fixtures, and measurement flows using lab equipment such as power supplies, SMUs, oscilloscopes, thermal hardware, handlers, sockets, and probe cards. Perform full thermal and mechanical stress characterization using bench stress platforms (e.g., Arora‑type testers) while monitoring electrical behavior under controlled stress. Conduct hot/cold, transient, and forced‑temperature testing with precision thermal systems (e.g., Sensata‑type chillers or thermal forcing units) to enable power-temperature correlation and failure‑onset analysis. Develop Python‑, Verilog‑, and C/C++‑based test programs to build targeted stress patterns, segmented workloads, custom modes, and observability hooks that accelerate root‑cause isolation. Drive correlation of bench results with assembly, test, and system-level data, including DOE-based studies to isolate sensitivities and interactions across thermal, mechanical, electrical, and structural domains. Analyze MBIST signatures and electrical or thermal behavior. Trace issues back to building, technology, package, or assembly root causes. Collaborate with test teams on improved screens and content. Lead failure‑mode identification and statistical analysis of multifaceted datasets to deliver clear, evidence-backed recommendations for building, process, package, or test mitigations while partnering closely with HBM Build, DTPCO, Technology Development, Packaging, Test, Product Engineering, and Reliability teams. A BS or equivalent experience with 8 years of proven experience is also acceptable. A Master's degree or equivalent experience in electrical engineering, computer engineering, mechanical engineering, materials science, or a related field is required. Strong fundamentals in semiconductor devices, memory architectures, and manufacturing/process flow. Hands-on experience with silicon or package-level characterization, bench/ATE testing, or product/test engineering. Confirmed understanding of electrical measurement techniques, lab instrumentation, and test platforms. Experience with programming and data analysis (Python, JMP/JSL, C/C++, or similar). Proven understanding of statistics and experimental methods (DOE). Ability to independently debug sophisticated problems and synthesize conclusions from incomplete or noisy data. Direct experience with HBM, DRAM, or advanced memory products. Experience running or analyzing MBIST-based testing and correlating to silicon behavior. Background in package product engineering, test solutions engineering, or silicon characterization. Familiarity with thermal and mechanical modeling concepts and correlation to lab data. Experience working across design, technology, package, and test teams to close issues. Demonstrated ability to turn characterization data into actionable engineering decisions.