Staff Engineer, Analog and Mixed Signal IC Design

Work with the product engineering team to verify silicon performance vs simulation performance of circuits. Provide layout supervision, as well as optimize layout throughout post-layout simulations. Demonstrated experience in mix-signal, digital, or analog IC design and development for volatile or nonvolatile memory technology. Proven experience in IC design with exposure to Regulator, Charge Pump, Oscillator, Current reference, Bandgap, and Comparator design experience is required. Exposure to modeling and simulation of ICs using SPICE and Verilog. 2+ years of experience communicating with technical and non-technical team members across a large organization. Solid knowledge of Synopsys and Cadence Virtuoso. BSEE or MSEE in Electrical Engineering with a minimum of 2 years of relevant Semiconductor Manufacturing experience. MSEE + 5 or BSEE + 10 years' post graduate mix-signal or analog IC design experience. 3+ years of exposure to circuit debugging in collaboration with other engineering teams. Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction).