Staff Signal Integrity Engineer

Development of future improvement in performance scaling, signaling, and sophisticated packaging Leverage modeling and simulation methodology to improve accuracy to signal integrity within or exceeding spec Active mentoring of junior team members through informal one-on-one collaboration and through more formal department-level and corporate-level opportunities Groundbreaking - think “outside-the-box” and yet offer innovative solutions within a set of practical constraints. Actively communicate and clearly convey vital details of sophisticated issues and corresponding solutions in both written and verbal formats PhD or MSEE w/10 years of industry experience. Strong SI/PI/EMI theory and application, modeling, analysis, simulation. Signal and Power Integrity Background, particularly in areas that affect I/O circuit and signaling performance. Required courses covering electromagnetic, transmission line and RF theory, analog design or similar fields of study or experience. Experience with, and intermediate working knowledge of, E.M. field solvers (quasi-static and full wave), time and frequency domain simulation tools like Q3D, SIWAVE, HFSS, HSPICE, ADS, etc. Deep understanding of electromagnetic and transmission line theory, general I/O design, signal integrity, differential and single-ended interface technologies. Deep understanding of timing budgets and jitter analysis. Expertise in Printed Circuit Board (PCB) layout or electrical package design techniques. Experienced in design and analysis of high-speed single-ended or differential buses. Familiarity with, and fundamental understanding of, lab measurement equipment like Oscilloscopes, TDR, Vector Network Analyzer (VNA), etc. Familiarity with statistical analysis (DOE) and equivalent tools (example: JMP) is also beneficial. Master's degree or PhD in Electrical Engineering or related technical field Desirable: Mixed-signal Circuit Design Background. Desirable: Memory industry experience.