Intern - ASIC Digital Design

Support the design of high-speed digital logic for tester ASICs and memory controller IP. Collaborate with teams across Design Verification, Analog Design, Synthesis, and Lab Validation. Assist in integrating digital designs with full custom analog blocks and third-party IP. Present complex engineering concepts clearly to team members. Contribute to design documentation and participate in design reviews. Currently pursuing a B.S., M.S., or Ph.D. in Electrical Engineering, or equivalent experience. Strong understanding of logic design, verification techniques, and high-speed IO crossings. Experience with software programming and scripting (e.g., Linux shell, Python). Excellent written and verbal communication skills. Must not graduate before August 2026. Familiarity with analog and mixed-signal circuits (e.g., CMOS/CML logic, PLL, DLL, CDR). Experience with industry-standard tools for synthesis, linting, formal verification, etc. Demonstrated curiosity and eagerness to learn and contribute in a team environment.