Intern - Design Engineering, HBM

Design and analyze digital and analog circuits for advanced DRAM/HBM Contribute to floorplanning, parasitic modeling, and design validation/tape-out revisions Simulate and verify designs using tools like FineSim/HSPICE and SystemVerilog/UVM Build golden models and run corner/Monte Carlo analyses to ensure robust margins Optimize for power, performance, and area (PPA) using scripting and automation Collaborate with Product Engineering, Test/Probe, Process Integration, Assembly, and Marketing Standardize and automate design checks and flows with CAD and verification teams Explore new circuit topologies and EDA automation for future memory nodes Pursuing a degree in Electrical Engineering or a related field Strong foundation in CMOS circuit design and device physics Experience reading schematics, timing diagrams, and RTL Familiarity with FineSim and/or HSPICE, SystemVerilog, and scripting languages (Python/Tcl/Perl) Strong analytical problem-solving skills and ability to work in cross-disciplinary teams Familiarity with memory design (DRAM/HBM/SRAM) and SoC/IO interfaces Experience with data analysis or scripting to accelerate simulations (e.g., Python with NumPy or Pandas) Interest in EDA automation or applying ML techniques for design optimization Curiosity about AI's impact on chip design and emerging tools Clear written and verbal communication skills